The present invention generally relates to a printed circuit board having an embedded capacitor comprising a dielectric layer formed of a polymeric material or the like and having a substantially uniform thickness, and to its method of fabrication.
The trend in printed circuit board manufacture is towards further miniaturization and the incorporation of formerly stand alone passive components, for example, capacitors and resistors, in built-up layers thereon. Replacement with integrated components is particularly advantageous because it reduces the cost associated with placement of discrete components on the board and also because it makes available valuable area on the board surface for additional circuitry and other electrical components.
It has been proposed to form an embedded capacitor in the built-up layers by patterning a lower metal electrode, coating the lower electrode with a polymeric layer and then forming a second metal electrode on the polymeric layer. At the perimeter of the lower electrode, there is a tendency for the polymeric coating to become thinner than in planar regions. This thinning can result in exposed edges that create shorts between the electrodes.
There has also been difficulty obtaining embedded capacitors with precise capacitances using standard coating techniques. To control capacitance, it is necessary to control both the thickness and uniformity of the dielectric layer. A patterned dielectric layer tends to planarize fairly well over narrow, small, patterned metal features. However, when the underlying metal feature is large, the dielectric layer is not reliably level and may be substantially thicker, reducing capacitance and making it difficult to achieve the desired capacitance value with precision.
Thus, there is a need for a capacitor adapted for fabrication within a multilayer board and having a dielectric layer formed of a polymeric material and having a substantially uniform thickness. In a preferred case, it is desired to manufacture such capacitors at relatively low cost using existing printed circuit board manufacturing equipment and know how.
According to the present invention, a method is provided for forming a capacitor as an integral element of a printed circuit board. The method entails providing a first metal plate on a dielectric substrate. A dielectric layer, preferably formed of a photopolymeric material, is then applied onto a first region of the first metal plate. The first metal plate also includes a second region that is exposed about the dielectric layer. Thereafter, a second metal plate is deposited onto the dielectric layer and the second region of the first metal plate. The second metal plate is patterned to form an upper electrode overlying the dielectric layer and electrically isolated from the first metal plate. In a preferred embodiment, this is accomplished by forming a trench in the second plate about the upper electrode. Thus, the resulting capacitor comprises a lower electrode structure featuring a metal plate applied to a substrate, a dielectric layer overlying the first region of the metal plate, and an upper electrode overlying the dielectric layer. Moreover, in the preferred embodiment, the lower electrode structure comprises an extension derived from the second metal plate and disposed about the dielectric layer. The extension includes a lip overlying a perimeter surface of the dielectric layer spaced apart from the upper electrode by the trench. In still another aspect of this invention, a polymeric coating is applied over the capacitor, whereby the capacitor becomes embedded therein, and metallized connections are formed through vias in the polymeric coating to the upper electrode and the lower electrode structure for electrically coupling the capacitor, for example, to electrical features subsequently formed on the surface.
From the above, those skilled in the art will appreciate that the method described above is conducive to inline printed circuit board processing, thus enabling high throughput and short cycle time. More significantly, since the dielectric layer is formed on the metal plate prior to the patterning step that defines the lower electrode structure, the method is particularly adapted for forming a dielectric layer having a uniform thickness and thereby achieving capacitors having consistent and predetermined capacitance values.